Working groups

Working Group 1 Advanced CMOS

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Advanced CMOS

Multi-chamber ECR-RIE-system for processes involving fluorine and chlorine, with automated sample transfer.
(Photograph: Roth & Rau AG Wüstenbrand)


Structural widths of 250nm are state-of-the-art in CMOS technology. A reduction down to below 100nm within 10 years, for further miniaturization, is envisaged by the Semiconductor Industry Association (SIA). Along with this trend, higher frequency and reliability are required. This implies novel developments in materials and processes for both the active elements and the circuit system, including advanced equipment for larger Si-wafer production.

Present-day systems are made of contacts (TiSi2), barrier layers (TiN, TiW), isolating interlayers (SiO2), interlayer connections and conducting paths (Al-alloys). Copper with its high conductivity and stability with respect to electromigration is expected to become a future conducting path mateial leading to higher frequency and reliability. This would require a precise technology of copper deposition and structuring (aspect ratio > 3) and the availability of suitable barrier layers suppressing interdiffusion and reactions. The barrier layers must not affect the conductivity of the paths, which requires ultra-thin films.

Head of the working group:

Prof. Dr. Thomas Geßner

Technische Universität Chemnitz
Fakultät für Elektrotechnik und Informationstechnik
Zentrum für Mikrotechnologien
Reichenhainer Straße 70, 09126 Chemnitz
Phone 0371 / 531 31 30
Fax 0371 / 531 31 31




©  Nano-CC-UFF 2010 Contact:
Office of Center of Competence "Ultrathin Functional Films"
at Fraunhofer IWS Dresden
Dr. Ralf Jäckel
Phone +49 (0) 351 / 83391 - 3444, Fax +49 (0) 351 / 83391 - 3300